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XC9223/XC9224 Series
1A Driver Transistor Built-In Step-Down DC/DC Converters
ETR0509_007
GENERAL DESCRIPTION
GreenOperation-Compatible
The XC9223/XC9224 series are synchronous step-down DC/DC converters with a 0.21 (TYP.) P-channel driver transistor and a synchronous 0.23 (TYP.) N-channel switching transistor built-in. A highly efficient and stable current can be supplied up to 1.0A by reducing ON resistance of the built-in transistor. With a high switching frequency of 1.0MHz or 2.0MHz, a small inductor is selectable; therefore, the XC9223/XC9224 series are ideally suited to applications with height limitation such as HDD or space-saving applications. Current limit value can be chosen either 1.2A (MIN.) when the LIM pin is high level, or 0.6A (MIN.) when the LIM pin is low level for using the power supply which current limit value differs such as USB or AC adapter. With the MODE/SYNC pin, the XC9223/XC9224 series provide mode selection of the fixed PWM control or automatically switching current limit PFM/PWM control. As for preventing unwanted switching noise, the XC9223/XC9224 series can be synchronized with an external clock signal within the range of 25% toward an internal clock signal via the MODE/SYNC pin. For protection against heat damage of the ICs, the XC9223/XC9224 series build in three protection functions: integral latch protection, thermal shutdown, and short-circuit protection. With the built-in U.V.L.O. (Under Voltage Lock Out) function, the internal P-channel driver transistor is forced OFF when input voltage becomes 1.8V or lower. The XC9223B/XC9224B series' detector function monitors the discretional voltage by external resistors.
APPLICATIONS
HDD Notebook computers CD-R / RW, DVD PDAs, Portable communication modems Digital cameras, Video recorders Various general-purpose power supplies
FEATURES
Input Voltage Range Output Voltage Range Oscillation Frequency Output Current Maximum Current Limit Controls Protection Circuits : 2.5V ~ 6.0V : 0.9V ~ VIN (set by FB pin) : 1MHz, 2MHz (+15% accuracy) : 1.0A : 0.6A (MIN.) ~ 0.9A (MAX) with LIM pin='L' : 1.2A (MIN.) ~ 2.0A (MAX.) with LIM pin='H' : PWM/PFM or PWM by MODE pin : Thermal shutdown Integral latch method Short-circuit protection : 1ms (TYP.) internally set : B type (with VD function) D type (without VD function) : 0.21
Soft-Start Time Voltage Detector
Built-in P-channel MOSFET Built-in Synchronous : 0.23 N-channel MOSFET (No Schottky Barrier Diode Required) High Efficiency : 95% (VIN=5.0V, VOUT=3.3V) Synchronized with an External Clock Signal Ceramic Capacitor Compatible Packages : MSOP-10, USP-10B, SOP-8 * SOP-8 package is available for the XC9223D type only.
TYPICAL APPLICATION CIRCUIT
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs. Output Current
XC9223B081Ax XC9223B081Ax
L=4.7 VIN=5V, FOSC=1MHz,
100 90 80 Efficiency: EFFI (%) 70 60 50 40 30 20 10 0 1
VIN=5V, FOSC=1M Hz, L =4.7uH(CDRH4D2 8C), H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic) CIN=10 uF(ceram i c), CL=1 0uF(cera m i c)
VOUT=3.3V
VOUT=1.5V
(*1) A capacitor of 2200pF0.1F is recommended to place at the CDD between the AGND pin and the VIN pin. Please refer to the page showing INSTRUCTION ON PATTERN LAYOUT for more detail.
PW M/PFM PW M
10 100 Output Current: IOUT (mA)
1000
1/25
XC9223/XC9224 Series
PIN CONFIGURATION
VIN 1 VDIN 2 AGND 3 VDOUT 4 FB 5 10 PGND 9 LX 8 CE 7 MODE/SYNC 6 LIM
VIN 1
8 PGND
AGND 2
7 LX
FB 3
6 CE
MSOP-10 (TOP VIEW)
LIM 4
5 MODE/SYNC
SOP-8 (TOP VIEW)
FB 5 VDOUT 4 AGND 3 VDIN 2 VIN 1 6 7 8 9 LIM MODE/SYNC CE LX
10 PGND
USP-10B (BOTTOM VIEW)
PIN ASSIGNMENT
MSOP-10 * 1 2 3 4 5 6 7 8 9 10 PIN NUMBER USP-10B * 1 2 3 4 5 6 7 8 9 10 SOP-8 ** 1 2 3 4 5 6 7 8 PIN NAME VIN VDIN AGND VDOUT FB LIM MODE/SYNC CE Lx PGND FUNCTION Input Voltage Detector Input Analog Ground VD Output Output Voltage Monitor Over Current Limit Setting Mode Switch / External Clock Input Chip Enable Output of Internal Power Switch Power Ground
* For MSOP-10 and USP-10B packages, please short the GND pins (pin #3 and 10) ** For SOP-8 package, please short the GND pins (pin# 2 and 8)
FUNCTION CHART
1. CE Pin Function
CE PIN H L OPERATIONAL STATE ON OFF *1
*1: Except for a voltage detector block in the XC9224 series.
2. MODE Pin Function
MODE PIN H L LIM PIN H L FUNCTION PWM Control PWM/PFM Automatic Control FUNCTION Maximum Output Current: 1.0A Maximum Output Current: 0.4A
3. LIM Pin Function
2/25
XC9223/XC9224
Series
PRODUCT CLASSIFICATION
Selection Guide
Ordering Information
XC9223 XC9224B DESIGNATOR DESCRIPTION Transistor built-in, Output voltage freely set (FB voltage), Current Limit: 0.6A/1.2A Reference Voltage SYMBOL B D 0 8 1 2 A Package D S Device Orientation R L DESCRIPTION : With VD function : Without VD function : Fixed reference voltage =0, =8 : 1.0MHz : 2.0MHz : MSOP-10 : USP-10B : SOP-8 (for the XC9223D type) : Embossed tape, standard feed : Embossed tape, reverse feed
DC/DC Oscillation Frequency
3/25
XC9223/XC9224 Series
BLOCK DIAGRAM
XC9223B/XC9224B Series
LIM
Current Limit PFM
VIN
Error Amp.
FB
Comparator PWM
Logic
Buffer Driver
Current Feedback
LX
CE
Vref with Soft-Start, CE
PGND
Ramp Wave Generator, OSC VD
MODE/ SYNC
PMW/PFM
Thermal Shutdown
AGND
VDOUT VDIN
XC9223D Series
LIM
Current Limit PFM
VIN
Error Amp.
FB
Comparator PWM
Logic
Buffer Driver
Current Feedback
LX
CE
Vref with Soft-Start, CE
PGND
Ramp Wave Generator, OSC
MODE/ SYNC
PMW/PFM
Thermal Shutdown
AGND
4/25
XC9223/XC9224
Series
ABSOLUTE MAXIMUM RATINGS
Ta=25OC PARAMETER VIN Pin Voltage VDIN Pin Voltage VDOUT Pin Voltage VDOUT Pin Current FB Pin Voltage LIM Pin Voltage MODE/SYNC Pin Voltage CE Pin Voltage Lx Pin Voltage Lx Pin Current MSOP-10 Power Dissipation USP-10B SOP-8 Pd Topr Tstg SYMBOL VIN VDIN VDOUT IDOUT VFB VLIM VMODE/SYNC VCE VLx ILx RATINGS - 0.3 ~ 6.5 - 0.3 ~ 6.5 - 0.3 ~ 6.5 10 - 0.3 ~ 6.5 - 0.3 ~ 6.5 - 0.3 ~ 6.5 - 0.3 ~ 6.5 - 0.3 ~ VDD + 0.3 2000 350 (*1) 150 300 - 40 ~ + 85 - 55 ~ +125 mW UNITS V V V mA V V V V V mA
Operating Temperature Range Storage Temperature Range
*1: When implemented on a PCB.
5/25
XC9223/XC9224 Series
ELECTRICAL CHARACTERISTICS
XC9223/XC9224 Series
PARAMETER Input Voltage FB Voltage Output Voltage Setting Range Maximum Output Current 1 (*1) Maximum Output Current 2 (*1) U.V.L.O. Voltage Supply Current 1 Supply Current 2 Stand-by Current Oscillation Frequency External Clock Signal Synchronized Frequency External Clock Signal Cycle Maximum Duty Cycle Minimum Duty Cycle PFM Switch Current Efficiency (*3) Lx SW `H' On Resistance (*4) Lx SW `L' On Resistance Current Limit 1 Current Limit 2 Integral Latch Time (*5) Short Detect Voltage Soft-Start Time Thermal Shutdown Temperature Hysteresis Width CE `H' Voltage SYMBOL VIN VFB VOUTSET IOUTMAX1 IOUTMAX2 VUVLO IDD1 IDD2 ISTB FOSC SYNCOSC SYNCDTY MAXDTY MINDTY IPFM EFFI RLxH RLxL ILIM1 ILIM2 TLAT VSHORT TSS TTSD THYS VCEH FB=VFB x 0.9, Voltage which Lx becomes `H' after CE voltage changed from 0.4V to 1.2V (*8) FB=VFB x 0.9, Voltage which Lx becomes `L' after CE voltage changed from 1.2V to 0.4V (*8) LIM=0V LIM=VIN FB=VFB x 0.9, Short Lx by 1 resistance FB Voltage which Lx becomes `L' (*8) CE=0V VIN, IOUT=1mA 0.3 0.5 1.2 FB=VFB x 0.9 FB=VFB x 1.1 Connected to external components, MODE/SYNC=0V, IOUT=10mA Connected to external components, VIN=5.0V, VOUT=3.3V, IOUT=200mA FB=VFB x 0.9, ILx=VIN-0.05V FB=VFB x 0.9, VIN Voltage which Lx pin voltage holding `L' level (*8) FB=VFB x 0.9, MODE/SYNC=0V FB=VFB x 1.1 (Oscillation stops), MODE/SYNC=0V CE=0V Connected to external components, IOUT=10mA Connected to external components, IOUT=10mA, apply an external clock signal to the MODE/SYNC 25 100 0.6 1.2 CONDITIONS MIN. 2.5 0.784 0.9 0.4 1.0 1.55 TYP. 0.800 1.80 D1-1 (*2) D1-2 (*2) D1-6 (*2) D1-3 (*2) D1-4 (*2) 200 95 0.21 0.23 D1-5 (*2) 0.4 1.0 150 20 0.5 2.0 75 0 250 0.3 (*7) 0.3 (*7) 0.9 2.0 MAX. 6.0 0.816 VIN 2.00 UNIT V V V A A V A A A MHz MHz % % % mA % A A ms V ms
O
Topr=25
CIRCUIT -
-
C C
-
O
V
CE `L' Voltage MODE/SYNC `H' Voltage MODE/SYNC `L' Voltage LIM `H' Voltage LIM `L' Voltage CE `H' Current CE `L' Current MODE/SYNC `H' Current MODE/SYNC `L' Current LIM `H' Current LIM `L' Current FB `H' Current FB `L' Current Lx SW `H' Leak Current Lx SW `L' Leak Current (*6)
VCEL VMODE/SYNCH VMODE/SYNCL VLIMH VLIML ICEH ICEL IMODE/SYNCH IMODE/SYNCL ILIMH ILIML IFBH IFBL ILeakH ILeakL
1.2 1.2
-
0.4 0.4 0.4 0.1 0.1 0.1 0.1 1.0 -
V V V V V A A A A A A A A A A
IOUT=ILIM1 x 1.1, Check LIM voltage which Lx oscillated after CE voltage changed from 1.2V to 0.4V VIN=CE=6.0V VIN=6.0V, CE=0V VIN=6.0V VIN=6.0V, MODE/SYNC=0V VIN=LIM=6.0V VIN=6.0V, LIM=0V VIN=FB=6.0V VIN=6.0V, FB=0V VIN=Lx=6.0V, CE=0V VIN=6.0V, Lx=CE=0V
- 0.1 - 0.1 - 0.1 - 0.1 - 3.0
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XC9223/XC9224
Series
ELECTRICAL CHARACTERISTICS (Continued)
XC9223/XC9224 Series (Continued), Voltage Detector Block (*9)
PARAMETER Detect Voltage Release Voltage Hysteresis Width Output Current Delay Time VDIN `H' Current VDIN `L' Current VDOUT `H' Current VDOUT `L' Current SYMBOL VDF VDR VHYS IDOUT TDLY IVDINH IVDINL IVDOUTH IVDOUTL CONDITIONS VDIN Voltage which VDOUT becomes `H' to `L', Pull-up resistor 200k VDIN Voltage which VDOUT becomes `L' to `H', Pull-up resistor 200k VHYS=(VDR-VDF) / VDF x 100 VDIN=VDF x 0.9, apply 0.25V to VDOUT Time until VDOUT becomes `L' to `H' after VDIN changed from 0V to 1.0V VIN=VDIN=6.0V VIN=6.0V, VDIN=0V VIN=VDIN=VDOUT=6.0V VIN=VDIN=6.0V, VDOUT=0V MIN. 0.676 0.716 2.5 0.5 - 0.1 - 1.0 TYP. 0.712 0.752 5 4.0 2.0 MAX. 0.744 0.784 8.0 0.1 1.0 -
Topr=25
UNIT V V % mA ms A A A A CIRCUIT
Test Condition: Unless otherwise stated, VIN=3.6V, CE=VIN, MODE/SYNC=VIN NOTE: *1: When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes. If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance. *2: Refer to the chart below. *3: EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100 *4: On resistance ()= (VIN- Lx pin measurement voltage) / 100mA *5: Time until it short-circuits Lx with GND through 1 of resistance from a state of operation and is set to Lx=Low from current limit pulse generating. *6: When temperature is high, a current of approximately 100 *7: Designed value. *8: Whether the Lx pin is high level or low level is judged at the condition of "H">VIN-0.1V and "L"<0.05V. *9: There is no voltage detector function available in the XC9223D series. A may leak.
Electrical Characteristics Standard Values No. D1-1 D1-2 D1-3 D1-4 D1-5 PARAMETER Supply Current 1 Supply Current 2 Oscillation Frequency External Clock Synchronous Oscillation Integral Latch Time SYMBOL IDD1 IDD2 FOSC SYNCOSC TLAT 1MHz TYP. 380 30 1.00 6.0 2MHz TYP. 440 45 2.0 3.0
MIN. 0.85 0.75 -
MAX. 700 60 1.15 1.25 15.0
MIN. 1.7 1.5 -
MAX. 800 80 2.3 2.5 15.0
No. D1-6
PARAMETER Stand-by Current
SYMBOL ISTB
XC9223 SERIES MIN. TYP. MAX. 0.1 2.0
XC9224 SERIES MIN. TYP. MAX. 7.0 15.0
7/25
XC9223/XC9224 Series
TYPICAL APPLICATION CIRCUIT
(*1) A capacitor of 2200pF0.1F is recommended to place at the CDD between the AGND pin and the VIN pin. Please refer to the page showing INSTRUCTION ON PATTERN LAYOUT for more detail.
Output voltage can be set by adding external split resistors. Output voltage is determined by the following equation, based on the values of RFB1 and RFB2. The sum of RFB1 and RFB2 should normally be 1M or less. VOUT = 0.8 x (RFB1 + RFB2) / RFB2 The value of CFB, speed-up capacitor for phase compensation, should be fzfb = 1 / (2 x x CFB1 x RFB1) which is equal to 20kHz. Adjustments are required from 1kHz to 50kHz depending on the application, value of inductance (L), and value of load capacity (CL). [Example of calculation] When RFB1=470k, RFB2=150k, VOUT1 = 0.8 x (470k + 150k) / 150k =3.3V [Typical example] VOUT (V) 1.0 1.2 1.5 1.8 RFB1 (k) 75 150 130 300 RFB2 (k) 300 300 150 240 CFB (pF) 110 51 62 27 VOUT (V) 2.5 3.0 3.3 5.0 RFB1 (k) 510 330 470 430 RFB2 (k) 240 120 150 82 CFB (pF) 15 24 18 18
* When fzfb = 20kHz
[External components] 1MHz: L: 4.7 H (CDRH4D28C, SUMIDA) CL: 10 F (ceramic) CIN: 10 F (ceramic) 2MHz: L: 2.2 H (CDRH4D28, SUMIDA) 2.2 H (VLCF4020T-2R2N1R7, TDK) CL: 10 F (ceramic) CIN: 10 F (ceramic)
* As for CIN and CL, use output capacitors of 10 F or more. (Ceramic capacitor compatible)
* High ESR (Equivalent Series Resistance) that comes by using a tantalum or an electrolytic capacitor causes high ripple voltage. Furthermore, it can cause an unstable operation. Use the IC after you fully confirm with an actual device.
8/25
XC9223/XC9224
Series
OPERATIONAL EXPLANATION
Each unit of the XC9223/XC9224 series consists of a reference voltage source, a ramp wave circuit, error amplifier, PWM comparator, phase compensation circuit, output voltage adjustment resistors, P-channel MOS driver transistor, N-channel MOS synchronous rectification switching transistor, current limiter circuit, U.V.L.O. circuit and others. The series compares, using the error amplifier, the internal reference voltage to the VOUT pin with the voltage feedback via resistors RFB1 and RFB2. Phase compensation is performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the turn-on time during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from the error amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage. The current feedback circuit monitors the P-channel MOS driver transistor current for each switching operation, and modulates the error amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even when a low ESR capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage. The reference voltage source provides the reference voltage to ensure stable output voltage of the DC/DC converter. The ramp wave circuit determines switching frequency. The frequency is fixed internally and can be selected from 1.0MHz and 2.0MHz. Clock pulses generated in this circuit are used to produce ramp waveforms needed for PWM operation, and to synchronize all the internal circuits. The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback voltage divided by the internal resistors (RFB1 and RFB2). When a voltage lower than the reference voltage is fed back, the output voltage of the error amplifier increases. The gain and frequency characteristics of the error amplifier output are fixed internally to deliver an optimized signal to the mixer. The current limiter circuit of the XC9223/XC9224 series monitors the current flowing through the P-channel MOS driver transistor connected to the Lx pin, and features a combination of the constant-current type current limit mode and the operation suspension mode. For the current limit values, please select the values either from 1.2A (MIN.) when the LIM pin is high level or 0.6A (MIN.) when the LIM pin is low level. 1When the driver current is greater than a specific level, the constant-current type current limit function operates to turn off the pulses from the Lx pin at any given time. 2When the driver transistor is turned off, the limiter circuit is then released from the current limit detection state. 3At the next pulse, the driver transistor is turned on. However, the transistor is immediately turned off in the case of an over current state. 4 When the over current state is eliminated, the IC resumes its normal operation. The IC waits for the over current state to end by repeating the steps 1 through 3. If an over current state continues for several msec and the above three steps are repeatedly performed, the IC performs the function of latching the OFF state of the driver transistor, and goes into operation suspension mode. After being put into suspension mode, the IC can resume operation by turning itself off once and then starting it up using the CE pin, or by restoring power to the VIN pin. Integral latch time may be released from a current limit detection state because of the noise. Depending on the state of a substrate, it may result in the case where the latch time may become longer or the operation may not be latched. Please locate an input capacitor as close as possible.
ms Limit < # mS
Limit > # ms mS Current Limit LEVEL
IOUT
0mA
VOUT
VSS
LX
CE
Restart
VIN
9/25
XC9223/XC9224 Series
OPERATIONAL EXPLANATION (Continued)
For protection against heat damage of the ICs, thermal shutdown function monitors chip temperature. The thermal shutdown circuit starts operating and the driver transistor will be turned off when the chip's temperature reaches 150OC. When the temperature drops to 130OC or less after shutting of the current flow, the IC performs the soft start function to initiate output startup operation. The short-circuit protection circuit monitors FB voltage. In case where output is accidentally shorted to the Ground and when the FB voltage decreases less than half of the FB voltage, the short-circuit protection operates to turn off and to latch the driver transistor. In latch mode, the operation can be resumed by either turning the IC off and on via the CE pin, or by restoring power supply to the VIN pin. The detector block of the XC9223/9224 series detects a signal inputted from the VDIN pin by the VDOUT pin (N-ch open-drain). When the VIN pin voltage becomes 1.8V (TYP.) or lower, the driver transistor is forced OFF to prevent false pulse output caused by unstable operation of the internal circuitry. When the VIN pin voltage becomes 2.0V (TYP.) or higher, switching operation takes place. By releasing the U.V.L.O. function, the IC performs the soft-start function to initiate output startup operation. The U.V.L.O. function operates even when the VIN pin voltage falls below the U.V.L.O. operating voltage for tens of ns. A MODE/SYNC pin has two functions, a MODE switch and an input of external clock signal. The MODE/SYNC pin operates as the PWM mode when applying high level of direct current and the PFM/PWM automatic switching mode by applying low level of direct current, which is the same function as the normal MODE pin. By applying the external clock signal (25% of the internal clock signal, ON duty 25% to 75%), the MODE/SYNC pin switches to the internal clock signal. Also the circuit will synchronize with the falling edge of external clock signal. While synchronizing with the external clock signal, the MODE/SYNC pin becomes the PWM mode automatically. If the MODE/SYNC pin holds high or low level of the external clock signal for several s, the MODE/SYNC pin stops synchronizing with the external clock and switches to the internal clock operation. (Refer to the chart below.) External Clock Synchronization Function
VOUT 50mV/div
Operates by the internal clock
Synchronous with the external clock
Lx 2V/div
1MHz
1.2MHz
External Clock Signal MODE/SYNC 2V/div 1.2MHz Duty50%
Delay time to the external clock synchronization 1.0s/div
* When an input of MODE/SYNC is changed from "L" voltage into a clock signal of 1.2MHz and 50% duty.
10/25
XC9223/XC9224
Series
OPERATIONAL EXPLANATION (Continued)
In PFM control operation, until coil current reaches to a specified level (IPFM), the IC keeps the P-ch MOSFET on. time that the P-ch MOSFET is kept on (TON) can be given by the following formula. IPFM TON= L IPFM (VIN VOUT) In this case,
In PFM control operation, the maximum duty cycle (MAXPFM) is set to 50% (TYP.). Therefore, under the condition that the duty increases (e.g. the condition that the step-down ratio is small), it's possible for P-ch MOSFET to be turned off even when coil current doesn't reach to IPFM. IPFM
IPFM Ton
IPFM FOSC
M axum um IPFM Current
Lx
Lx
I Lx
IPFM 0mA
I Lx
IPFM 0mA
11/25
XC9223/XC9224 Series
NOTES ON USE
1. The XC9223/XC9224 series is designed for use with ceramic output capacitors. If, however, the potential difference between dropout voltage, a ceramic capacitor may fail to absorb the resulting high switching energy and oscillation could occur on the output. In this case, use a larger capacitor etc. to compensate for insufficient capacitance. 2. Spike noise and ripple voltage arise in a switching regulator as with a DC/DC converter. These are greatly influenced by external component selection, such as the coil inductance, capacitance values, and board layout of external components. Once the design has been completed, verification with actual components should be done. 3. In PWM control, very narrow pulses will be outputted, and there is the possibility that some cycles may be skipped completely. This may happens while synchronizing with an external clock. 4. When the difference between VIN and VOUT is small, and the load current is heavy, very wide pulses will be outputted and there is the possibility that some cycles may be skipped completely. 5. With the IC, the peak current of the coil is controlled by the current limit circuit. Since the peak current increases when dropout voltage or load current is high, current limit starts operating, and this can lead to instability. When peak current becomes high, please adjust the coil inductance value and fully check the circuit operation. In addition, please calculate the peak current according to the following formula: Ipk = (VIN - VOUT) x OnDuty / (2 x L x FOSC) + IDOUT L: Coil Inductance Value FOSC: Oscillation Frequency 6. When the peak current, which exceeds limit current, flows within the specified time, the built-in P-ch driver transistor is turned off (an integral latch circuit). During the time until it detects limit current and before the built-in transistor can be turned off, the current for limit current flows; therefore, care must be taken when selecting the rating for the coil. 7. The voltage drops because of ON resistance of a driver transistor or in-series resistance of a coil. For this, the current limit may not be attained to the limit current value, when input voltage is low. 8. Malfunction may occur in the U.V.L.O. circuit because of the noise when pulling current at the minimum operation voltage. 9. This IC and the external components should be used within the stated absolute maximum ratings in order to prevent damage to the device. 10. Depending on the state of the PC Board, latch time may become longer and latch operation may not work. The board should be laid out so that capacitors are placed as close to the chip as possible. 11. In heavy load, the noise of DC/DC may influence and the delay time of the voltage detector may be prolonged. 12. Output voltage may become unstable when synchronizing high internal frequency with the external clock. In such a case, please use a larger output capacitor etc. to compensate for insufficient capacitance. 13. When a voltage lower than minimum operating voltage is applied, the output voltage may fall before reaching the over current limit. 14. When the IC is used in high temperature, output voltage may increase up to input voltage level at light load (less than 100 A) because of the leak current of the driver transistor. 15. The current limit is set to LIM=H: 2000mA (MAX.). However, the current of 2000mA or more may flow. In case that the current limit functions while the VOUT pin is shorted to the GND pin, when P-ch MOSFET is ON, the potential difference for input voltage will occur at both ends of a coil. For this, the time rate of coil current becomes large. By contrast, when N-ch MOSFET is ON, there is almost no potential difference at both ends of the coil since the VOUT pin is shorted to the GND pin. Consequently, the time rate of coil current becomes quite small. According to the repetition of this operation, and the delay time of the circuit, coil current will be converged on a certain current value, exceeding the amount of current, which is supposed to be limited originally. The short protection does not operate during the soft-start time. The short protection starts to operate and the circuit will be disabled after the soft-start time. Current larger than over current limit may flow because of a delay time of the IC when step-down ratio is large. A coil should be used within the stated absolute maximum rating in order to prevent damage to the device. Current flows into P-ch MOSFET to reach the current limit (ILIM). The current of ILIM (2000mA, MAX.) or more flows since the delay time of the circuit occurs during from the detection of the current limit to OFF of P-ch MOSFET. Because of no potential difference at both ends of the coil, the time rate of coil current becomes quite small. Lx oscillates very narrow pulses by the current limit for several msec. The short protection operates, stopping its operation.
Delay VLX #ms
Overcurrent Limit Value
ILX Coil Current
12/25
XC9223/XC9224
Series
INSTRUCTION ON PATTERN LAYOUT
1. In order to stabilize VIN's voltage level, we recommend that a by-pass capacitor (CIN) be connected as close as possible to the VIN & VSS pins. 2. Please mount each external component, especially CIN, as close to the IC as possible. 3. Wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit impedance. 4. Make sure that the PCB GND traces are as thick as possible, as variations in ground potential caused by high ground currents at the time of switching may result in instability of the IC. 5. Unstable operation may occur at the heavy load because of a spike noise. 2200pF ~0.1 F of a capacitor, CDD, is recommended to use between the AGND pin and the VIN pin for reducing noise.
TOP VIEW
L
Inductor
0
Jumper Chip
R
Resistor
BOTTOM VIEW
C
Ceramic Capaticor
13/25
XC9223/XC9224 Series
TEST CIRCUITS
Circuit
Waveform Measurement Point VIN CE MODE/ SYNC ILIM VDOUT AGND LX ILx
A
Circuit
A
VIN CE MODE/ SYNC ILIM VDOUT AGND
LX
1uF
FB
V
1uF
FB
VDIN PGND
VDIN PGND
Circuit
Waveform Measurement Point L VIN A V CIN V CE MODE/ SYNC ILIM VDOUT AGND FB RFB2 VDIN PGND CL LX RFB1 CFB IOUT A V
* External Components L (1MHz) : 4.7H (CDRH4D28C, SUMIDA) L (2MHz) : 2.2H (VLCF4020T-2R2N1R7, TDK) CIN : 10F (ceramic) CL : 10F (ceramic) RFB1 : 130k RFB2 : 150k CFB : 62pF (ceramic)
Circuit
Waveform Measurement Point VIN CE MODE/ SYNC ILIM CIN PULSE VDOUT AGND FB RFB2 VDIN PGND CL LX RFB1 CFB L IOUT
* External Components L (1MHz) : 4.7H (CDRH4D28C, SUMIDA) L (2MHz) : 2.2H (VLCF4020T-2R2N1R7, TDK) CIN : 10F (ceramic) CL : 10F (ceramic) RFB1 : 130k RFB2 : 150k CFB : 62pF (ceramic)
14/25
XC9223/XC9224
Series
TEST CIRCUITS (Continued)
Circuit
VIN A A A 1F A CE MODE/ SYNC ILIM VDOUT AGND
LX
A
FB A
A
VDIN PGND
Circuit
VIN CE 1F MODE/ SYNC ILIM VDOUT AGND
LX A FB
VDIN PGND
Circuit
VIN CE 1F A MODE/ 200k SYNC ILIM VDOUT AGND Waveform Measurement Point FB VDIN PGND LX
15/25
XC9223/XC9224 Series
TYPICAL PERFORMANCE CHARACTERISTICS
(1) Efficiency vs. Output Current
XC9223B081Ax 100 90 80 Efficiency: EFFI (%) 70 60 50 40 30 20 10 0 1 10 100 Output Current: IOUT (mA) 1000 PW M/PFM PW M VOUT=1.5V VOUT=3.3V Efficiency: EFFI (%)
VIN=5V, FOSC=1MHz, L=4.7 H (CDRH4D28C), VIN=5V, FOSC=1M Hz, L=4.7uH(CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic) CIN=10uF(ceram ic), CL=10uF(ceram ic)
XC9223B082Ax 100 90 80 70 60 50 40 30 20 10 0 1 10 100 Output Current: IOUT (mA) 1000 PW M/PFM PW M VOUT=1.5V VOUT=3.3V
VIN=5V, FOSC=2M Hz,L=2.2 H (CDRH4D28), VIN=5V, FOSC=2MHz, L=2.2uH(CDRH4D28), CIN=10uF(ceram ic), CL=10uF(ceram ic) CIN=10 F (ceramic), CL=10 F (ceramic)
XC9223B081Ax
VIN=3.3V, FOSC=1MHz, L=4.7 H (CDRH4D28C), VIN=3.3V,FOSC=1MHz CIN=10 F (ceramic), CL=10 F (ceramic) L=4.7uH(CDRH4D28C),CIN=10uF(ceramic),CL=10uF(ceramic)
XC9223B082Ax XC9223B081Ax
VIN=3.3V,FOSC=2MHz VIN=3.3V, FOSC=2MHz, L=2.2 H (CDRH4D28), L=2.2uH(CDRH4D28),CIN=10uF(ceramic),CL=10uF(ceramic) CIN=10 F (ceramic), CL=10 F (ceramic)
100 90 80 Efficiency[%} Efficiency: EFFI (%)
100 90 80
Efficiency: EFFI (%) Efficiency[%}
70 60 50 40 30 20 10 0 1 10 100 1000 Output Current : IOUT (mA) PWM/PFM PWM VOUT =1.5V VOUT =2.5V
70 60 50 VOUT=1.5V 40 30 20 10 0 1 10 100 1000 Output Current : IOUT (mA) PWM/PFM PWM VOUT=2.5V
Output Current: IOUT (mA)
Output Current: IOUT (mA)
(2) Output Voltage vs. Output Current
XC9223B081Ax 3.6 3.5 3.4 3.3 3.2 PW M/PFM Automatic Switching Control 3.1 3 1 10 100 Output Current: IOUT (mA) 1000
VIN=5.0V, T opr=25 o C, L:4.7uH(CDRH4D28C), VIN=5.0V, Topr=25 , L=4.7 H (CDRH4D28C), CIN=10uF(ceram ic),CL=10uF(ceram ic) CIN=10 F (ceramic), CL=10 F (ceramic)
XC9223B082Ax 1.6
VIN=5.0V, Topr=25 C, L:4.7uH(CDRH4D28C), VIN=5.0V,T opr=25 o, L=4.7 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic) CIN=10uF(ceram ic),CL=10uF(ceram ic)
Output Voltage: VOUT (V)
PW M Control
Output Voltage: VOUT (V)
1.55
PW M Control
1.5
1.45
PW M/PFM Automatic Switching Control
1.4 1 10 100 Output Current: IOUT (mA) 1000
16/25
XC9223/XC9224
Series
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(2) Output Voltage vs. Output Current (Continued)
XC9223B081Ax 2.8 2.7 2.6 2.5 2.4 PW M/PFM Automatic Switching Control 2.3 2.2 1 10 100 Output Current: IOUT (mA) 1000
VIN=3.3V,T opr=25 o C,L=4.7 H (CDRH4D28C), VIN=3.3V, Topr=25 , L:4.7uH(CDRH4D28C), CIN=10uF(ceram ic), CL=10uF(ceram ic) CIN=10 F (ceramic), CL=10 F (ceramic)
XC9223B082Ax
VIN=3.3V, opr=25 , L:4.7uH(CDRH4D28C), VIN=3.3V,TTopr=25o C, L=4.7 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic) CIN=10uF(ceram ic),CL=10uF(ceram ic)
1.6
PW M Control Output Voltage: VOUT (V) PW M Control 1.55
Output Voltage: VOUT (V)
1.5
1.45
PW M/PFM Automatic Switching Control
1.4 1 10 100 Output Current: IOUT (mA) 1000
(3) Oscillation Frequency vs. Ambient Temperature
XC9223/24 Series XC9223/XC9224 Series 1.40 Oscillation Frequency: FOSC (MHz) 2.8
(4) U.V.L.O. Voltage vs. Ambient Temperature
XC9223/24 Series XC9223/XC9224 Series 2.8 UVLO Voltage : UVLO1,UVLO2 (V) 2.6 UVLO2 2.4 2.2 2.0 1.8 1.6 1.4 -50 -25 0 25 50 75 Ambient Temperature : Ta (oC) 100 UVLO
1.20
1MHz
2.4
1.00 2MHz
2
0.80
1.6
0.60 -50 -25 0 25 50 75 Ambient Temperature : Ta (oC)
1.2 100
(5) Supply Current 2 vs. Input Voltage
XC9223/XC9224 Series (1MHz) XC9223/9424 Series (1MHz)
100
CE=FB=VIN, M ODE=0V
XC9223/24 Series (2MHz) XC9223/XC9224 Series (2MHz) 100
CE=FB=VIN, M ODE=0V
Supply Current 2: IDD2 (uA) 2 3 4 5 Input Voltage: VIN (V) 6 7
Supply Current 2: IDD2 (uA)
80
80
60
60
40
40
20
20
0
0 2 3 4 5 Input Voltage: VIN (V) 6 7
17/25
XC9223/XC9224 Series
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(6) Soft Start Time
XC9223/24 Series XC9223/XC9224 Series
VIN=5.0V,VOUT =3.3V,CE=05V IOUT =1m A,M ODE=VIN
XC9223/XC9224 Series XC9223/24 Series
VIN=5.0V,VOUT =1.5V,CE=05V IOUT =1m A,M ODE=0V
CE : 5V/div
CE : 5V/div
VOUT : 1V/div VOUT : 1V/div
500usec/div 500 s / div
500 s / div 500usec/div
(7) FB Voltage vs. Supply Voltage
XC9223/9424 Series XC9223/XC9224 Series
IOUT =0.1m A,T opr=25 o C
0.816
FB Voltage: VFB (V)
0.808
0.800
0.792
0.784 2.0 3.0 4.0 5.0 6.0 7.0
Input Voltage: VIN (V)
18/25
XC9223/XC9224
Series
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(8) Load Transient Response XC9223B081Ax <1MHz> VIN=5.0V, VOUT=3.3V, MODE/SYNC=VIN (PWM control) L=4.7 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
VOUT:200mV/div
VOUT:200mV/div
IOUT=200mA
IOUT=200mA
IOUT=1mA
IOUT=1mA 50usec/div 50 s / div
500usec/div 500 s / div
VOUT:200mV/div VOUT:200mV/div
IOUT=800mA
IOUT=800mA IOUT=200mA
IOUT=200mA 50usec/div 50 s / div 500usec/div 500 s / div
VIN=5.0V, VOUT=3.3V, MODE/SYNC=0V (PWM/PFM automatic switching control) L=4.7 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
VOUT:200mV/div VOUT:200mV/div
IOUT=200mA
IOUT=200mA IOUT=1mA
IOUT=1mA 50usec/div 50 s / div 500usec/div 500 s / div
19/25
XC9223/XC9224 Series
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(8) Load Transient Response (Continued) XC9223B081Ax <1MHz> (Continued) VIN=5.0V, VOUT=1.5V, MODE/SYNC=VIN (PWM control) L=4.7 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
VOUT:200mV/div
VOUT:200mV/div
IOUT=200mA
IOUT=200mA IOUT=1mA
IOUT=1mA
50 50usec/div s / div
200usec/div 200 s / div
VOUT:200mV/div
VOUT:200mV/div
IOUT=800mA
IOUT=800mA IOUT=200mA
IOUT=200mA
5050usec/div s / div
200usec/div 200 s / div
VIN=5.0V, VOUT=1.5V, MODE/SYNC=0V (PWM/PFM automatic switching control) L=4.7 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
VOUT:200mV/div VOUT:200mV/div
IOUT=200mA
IOUT=200mA IOUT=1mA
IOUT=1mA
50 s / div 50usec/div
200 s / div 200usec/div
20/25
XC9223/XC9224
Series
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(8) Load Transient Response (Continued) XC9223B082Ax <2MHz> VIN=5.0V, VOUT=3.3V, MODE/SYNC=VIN (PWM control) L=2.2 H (CDRH4D28), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
VOUT:200mV/div VOUT:200mV/div
IOUT=200mA
IOUT=200mA IOUT=1mA
IOUT=1mA 50usec/div 50 s / div 500usec/div 500 s / div
VOUT:200mV/div VOUT:200mV/div
IOUT=800mA
IOUT=800mA IOUT=200mA
IOUT=200mA 50usec/div 50 s / div 500usec/div 500 s / div
VIN=5.0V, VOUT=3.3V, MODE/SYNC=0V (PWM/PFM automatic switching control) L=2.2 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
VOUT:200mV/div VOUT:200mV/div
IOUT=200mA
IOUT=200mA IOUT=1mA
IOUT=1mA 50usec/div 50 s / div
500 s / div 500usec/div
21/25
XC9223/XC9224 Series
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(8) Load Transient Response (Continued) XC9223B082Ax <2MHz> (Continued) VIN=5.0V, VOUT=1.5V, MODE/SYNC=VIN (PWM control) L=2.2 H (CDRH4D28), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
VOUT:200mV/div
VOUT:200mV/div
IOUT=200mA
IOUT=200mA IOUT=1mA
IOUT=1mA 50usec/div 50 s / div
200usec/div 200 s / div
VOUT:200mV/div VOUT:200mV/div
IOUT=800mA
IOUT=800mA IOUT=200mA
IOUT=200mA
50 s / div 50usec/div VIN=5.0V, VOUT=1.5V, MODE/SYNC=0V (PWM/PFM automatic switching control) L=2.2 H (CDRH4D28C), CIN=10 F (ceramic), CL=10 F (ceramic), Topr=25OC
200 s / div 200usec/div
VOUT:200mV/div VOUT:200mV/div
IOUT=200mA
IOUT=200mA IOUT=1mA
IOUT=1mA
50 s / div 50usec/div
200usec/div 200 s / div
22/25
XC9223/XC9224
Series
PACKAGE INFORMATION
MSOP-10
1 0.15+0.08 1 0.53+0.13
USP-10B
2.9+0.15
3.00+0.10
1 4.90+0.20
AAA AAAA
3.00+0.10
1 0~ 6
O
MAX.0.6
2.6+0.15
0.125
0.2+0.05 0.45+0.05 0.2+0.05 0.2+0.05 0.45+0.05 0.15 0.2 0.325 0.3 0.3
1 0.20 -0.05
+0.1
(0.5)
1 0~0.15
1 0.86+0.15
0.65 0.1+0.03
0.65 0.5 2.5+0.1
0.5 0.1+0.03
SOP-8
0.2
+0.01 -0.1
4.20.4
6.1 -0.30
+0.40
5.0
+0.50 -0.20
0.40.04
0
10
00.25
1.50.1
1.58 -0.18
+0.15
1.270.03
0.40.1
0.4+0.03
1.6+0.1
0.25+0.1
23/25
XC9223/XC9224 Series
PACKAGING INFORMATION (Continued)
USP-10B Recommended Pattern Layout
1.50 0.45 1.05 0.80 0.20 0.20 1.05 0.80 1.50 0.45
0.35
USP-10B Recommended Metal Mask Design
1.45 1.10 0.70 1.45 1.10 0.70
0.35
0.025
0.125 0.125 0.125 0.125 0.125 0.125 1.25 1.35
0.025
0.475 0.025 0.25
0.25 0.225 0.225 0.25 1.25 1.35
0.075
0.475 0.025
0.10
0.30
0.15
0.15
0.20
0.40
0.20
MARKING RULE
MSOP-10
Represents products series MARK 0 A

10 9
8
76
PRODUCT SERIES XC9223xxxxAx XC9224xxxxAx
Represents type of DC/DC converters MARK B Represents reference voltage MARK PRODUCT SERIES 8 XC9223/9224x08xAx PRODUCT SERIES XC9223/9224BxxxAx
12
3
4
5
0
MSOP-10 (TOP VIEW)
Represents oscillation frequency MARK 1 2 OSCILLATION FREQUENCY 1.0MHz 2.0MHz PRODUCT SERIES XC9223/9224xxx1Ax XC9223/9224xxx2Ax
Represents production lot number 01 to 09, 0A to 0Z, 10 to 19, 1A~ in order. (G, I, J, O, Q, W excepted) Note: No character inversion used.
ex.)
MARKING 0 1 3 A
PRODUCTION LOT NUMBER 03 1A
24/25
0.075
0.30 0.10 0.55 0.55 1.05 1.05
0.25
XC9223/XC9224
Series
1. The products and product specifications contained herein are subject to change without notice to improve performance characteristics. Consult us, or our representatives before use, to confirm that the information in this catalog is up to date. 2. We assume no responsibility for any infringement of patents, patent rights, or other rights arising from the use of any information and circuitry in this catalog. 3. Please ensure suitable shipping controls (including fail-safe designs and aging protection) are in force for equipment employing products listed in this catalog. 4. The products in this catalog are not developed, designed, or approved for use with such equipment whose failure of malfunction can be reasonably expected to directly endanger the life of, or cause significant injury to, the user. (e.g. Atomic energy; aerospace; transport; combustion and associated safety equipment thereof.) 5. Please use the products listed in this catalog within the specified ranges. Should you wish to use the products under conditions exceeding the specifications, please consult us or our representatives. 6. We assume no responsibility for damage or loss due to abnormal use. 7. All rights reserved. No part of this catalog may be copied or reproduced without the prior permission of Torex Semiconductor Ltd.
25/25

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